1. Field of the Invention
The present invention relates to a semiconductor device and a method of fabricating the semiconductor device. More particularly, the present invention relates to a semiconductor device in which a high breakdown voltage lateral MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is formed on an SOI (Silicon On Insulator) substrate, and a method of fabricating such a semiconductor device.
2. Description of the Background Art
In recent years, a semiconductor device in which an IC circuit and a high breakdown voltage element are combined has been used in various applications. In particular, in a semiconductor device for use in the driving circuit of a plasma display, a high breakdown voltage lateral MOSFET is employed. The structures of conventional high breakdown voltage lateral MOSFETs will be described in detail below with reference to drawings.
FIG. 5 is a cross-sectional view showing a configuration of a conventional high breakdown voltage lateral MOSFET formed on an SOI substrate. In FIG. 5, a supporting substrate 101 serves as a base for forming the lateral MOSFET, and has a buried oxide film 102 formed thereon. An SOI layer 103 is formed on the buried oxide film 102. Although the supporting substrate 101 and the SOI layer 103 are originally individual silicon single crystal substrates, they are bonded together with the buried oxide film 102 placed therebetween and thereby compose a single substrate. A substrate having such a configuration is hereinafter referred to as an “SOI substrate”.
A drain region 104 is formed by doping a relatively low concentration of an N-type impurity into the SOI layer 103. A body region 105 is formed by doping a P-type impurity into the SOI layer 103. A source region 106 is formed by doping a high concentration of an N-type impurity into the body region 105. A LOCOS (Local Oxidation of Silicon) oxide film 107 is an element isolating film formed on a main surface of the SOI layer 103 and is an oxide film formed by a thermal oxidation process. A gate oxide film 108 is an insulating film formed over both the drain region 104 and the body region 105 and between the source region 106 and the LOCOS oxide film 107, so as to contact with the LOCOS oxide film 107.
A gate electrode 109 is a polysilicon electrode formed on the gate oxide film 108. Interlayer insulating films 110a, 110b, and 110c are formed on a main surface of the SOI substrate so as to cover the gate electrode 109, the LOCOS oxide film 107, and the like. A source electrode 111 is a metallic electrode formed over both the interlayer insulating films 110a and 110b. A part of the source electrode 111 is connected to the source region 106. A drain electrode 112 is a metallic electrode formed over both the interlayer insulating films 110a and 110c. Apart of the drain electrode 112 is connected to the drain region 104. An isolation trench 113 is provided to electrically isolate adjacent elements. A filling insulating film 114 is an insulating film to fill the isolation trench 113.
In the high breakdown voltage lateral MOSFET configured in the above-described manner, if a high voltage is applied to the drain electrode 112 while the source electrode 111 and the gate electrode 109 are grounded, the electric field at a PN junction between the body region 105 and the drain region 104 increases, and as a result, a depletion layer spreads within the drain region 104 having a lower impurity concentration than the body region 105. Here, due to the influence of a fixed charge present in the drain region 104, the influence of an interface charge present at an interface between the drain region 104 and the LOCOS oxide film 107, or the like, the spread of the depletion layer on a main surface of the drain region 104 is suppressed, and therefore an electric field is concentrated at a PN junction portion, whereby the PN-junction breakdown voltage capability becomes susceptible to degradation.
In view of this, in order to improve the PN-junction break down voltage capability, the gate electrode 109 and the source electrode 111 employ a field plate structure as follows. The gate electrode 109 has a field plate structure in which an end of the gate electrode 109 above the drain region 104 is extended over a part of the LOCOS oxide film 107 to provide a field plate portion 109a; the gate electrode 109 and the field plate portion 109a are integrally formed. The source electrode 111 has a field plate structure in which an end of the source electrode 111 above the drain region 104 is extended over a part of the LOCOS oxide film 107 to provide a field plate portion 111a; the source electrode 111 and the field plate portion 111a are integrally formed.
By thus providing a field plate structure to the gate electrode 109 and the source electrode 111, the spread of a depletion layer on the main surface of the drain region 104 can be promoted and thus the electric field concentration at the PN junction portion can be reduced. Accordingly, the PN-junction breakdown voltage capability between the body region 105 and the drain region 104 can be improved. Such an effect is hereinafter referred to as the “field plate effect”.
By providing the field plate portion 111a of the source electrode 111 so as to extend further than the field plate portion 109a of the gate electrode 109 in a drain region direction (shown by an arrow in FIG. 5), the field plate effect can be further enhanced compared to the case where a field plate structure is provided only to the gate electrode 109; or the case where an end of the field plate portion 111a and an end of the field plate portion 109a above the drain region 104, as viewed from the main surface of the supporting substrate 101, are both at the same position; or the case where the field plate portion 109a is provided so as to extend further than the field plate portion 111a in the drain region direction.
In FIG. 5, a broken line a5 indicates an equipotential line in the drain region 104 with point A present below an end of the field plate portion 111a of the source electrode 111, as the center; and a broken line b5 indicates an equipotential line in the drain region 104 with point B present below an end of the field plate portion 109a of the gate electrode 109, as the center. By providing the field plate portion 111a of the source electrode 111 so as to extend further than the field plate portion 109a of the gate electrode 109 in the drain region direction, the combined thickness of the insulating films present below the end of the field plate portion 111a, i.e., the combined thickness of the LOCOS oxide film 107 and the interlayer insulating film 110a, becomes larger than the thickness of the insulating film present below the end of the field plate portion 109a of the gate electrode 109, i.e., the thickness of the LOCOS oxide film 107. Therefore, the equipotential line (broken line b5) is drawn toward the field plate portion 111a, where by a curvature reduction is prevented. By this, the increase in the electric field at the point B below the end of the field plate portion 109a of the gate electrode 109 is suppressed, making it possible to further improve the field plate effect.
Note, however, that if a high voltage is further applied to the drain electrode 112, the electric field at the point A below the end of the field plate portion 111a of the source electrode 111 rapidly increases. In such a case, as shown in FIG. 6, by increasing the combined thickness of the insulating films present below the end of the field plate portion 111a, in particular, a thickness d1 of the interlayer insulating film 110a, the increase in the electric field at the point A can be suppressed (see, for example, Japanese Laid-Open Patent Publication No. 9-289305).
The increase in the electric field at the point A can be suppressed for the following reasons. By increasing the thickness d1 of the interlayer insulating film 110a, the distance from a depletion layer boundary in the drain region 104 to the source electrode 111 is increased and accordingly the curvature of the equipotential line (broken line a6) in the drain region with the point A as the center is increased, whereby the effect of reducing electric field concentration can be obtained. Another reason is that since an electric field is loaded on the interlayer insulating film 110a, the LOCOS oxide film 107, and the drain region 104, by increasing the combined thickness of the interlayer insulating film 110a and the LOCOS oxide film 107 which are formed from an oxide film having a lower relative permittivity than a silicon, for example, and which are present below the end of the field plate 111a of the source electrode 111, the load of electric field on the drain region 104 can be reduced.
In FIG. 6, since an equipotential line (broken line b6) is drawn toward a field plate portion 111a of a source electrode 111 due to the field plate effect of the source electrode 111, the effect of preventing a reduction in the curvature of the equipotential line (broken line b6) in a drain region with point B as the center, can be obtained, which cannot be obtained with the case where a field plate structure is provided only to a gate electrode 109; accordingly the increase in the electric field present below an end portion of the gate electrode 109 as shown by the point B can be suppressed. Further, by increasing the thickness d1 of the interlayer insulating film 110a, the capacitance between the gate electrode 109 and the source electrode 111 is reduced, and therefore the effect of improving switching speed can also be obtained.
Japanese Laid-Open Patent Publication No. 9-289305 proposes a technique for further improving the PN-junction breakdown voltage capability between a body region 105 and a drain region 104, which is realized by the configuration of a semiconductor device shown in FIG. 6, in addition to which an insulation plate (not shown) is partially provided below an end of a field plate portion 111a of a source electrode 111.
However, as shown in FIG. 6, if the thickness d1 of the interlayer insulating film 110a present below the end of the field plate portion 111a is increased, a thickness d2 of the interlayer insulating film 110a formed above the end of the field plate portion 109a of the gate electrode 109 is also naturally increased. Consequently, the field plate effect of the source electrode 111 is reduced, and the equipotential line shown by the broken line b6 starts to depend greatly on the field plate effect of the gate electrode 109. In addition, since the thickness of an insulating film present below the end of the field plate portion 109a of the gate electrode 109, i.e., the thickness of an LOCOS oxide film 107, is small, the electric field at the point B rapidly increases.
FIG. 7 shows results obtained by analyzing the electric field distributions of the high breakdown voltage lateral MOSFETs shown in FIGS. 5 and 6 with a two-dimensional simulation. In FIG. 7, the vertical axis of the graph represents electric field (V/cm), and the horizontal axis represents the measured position of the electric field. A and B on the horizontal axis represent the points A and B of FIGS. 5 and 6, respectively. In FIG. 7, a broken line shows the analysis result for the case where the high breakdown voltage lateral MOSFET shown in FIG. 5 has an interlayer insulating film 110a with a thickness of 1.0 μm, and a solid line shows the analysis result for the case where the high breakdown voltage lateral MOSFET shown in FIG. 6 has an interlayer insulating film 110a with a thickness of 2.0 μm.
It is clear from the analysis results shown in FIG. 7 that by increasing the thickness of the interlayer insulating film 110a, although the increase in the electric field at the point A below the end of the field plate portion 111a of the source electrode 111 can be suppressed, the electric field at the point B below the end of the field plate portion 109a of the gate electrode 109 increases. From this fact, it can be seen that when the thickness of the interlayer insulating film 110a is below a certain thickness, by increasing the thickness of the interlayer insulating film 110a, the PN-junction breakdown voltage capability can be improved; however, when the thickness of the interlayer insulating film 110a is above the certain thickness, the PN-junction breakdown voltage capability is likely to degrade. Namely, it is not possible to further improve the PN-junction breakdown voltage capability only by adjusting the thickness of the interlayer insulating film 110a. 
To form an insulation plate below an end of a field plate 111a of a source electrode 111, as described in Japanese Laid-Open Patent Publication No. 9-289305, an additional process of depositing an insulating film is required, which increases processing costs. Further, even if such an insulation plate is provided, since the thickness of an insulating film between a gate electrode 109 and a source electrode 111 does not change, it is not possible to obtain the effect of improving switching speed resulting from a reduction in the capacitance between the gate electrode 109 and the source electrode 111.